111 Hardware Design And Verification jobs in Austin.

Austin

• Skills: VLSI, formal verification, micro-architecture, test plan, scripting language, assertion-based languages, design bugs, debugging, problem solving, team collaboration
• Level: entry
• Type: full_time

Austin

• Skills: analog design, mixed-signal ICs, circuit simulation, plls, timing applications, performance verification, silicon evaluation, behavioral models, layout supervision, system-level noise modeling
• Level: entry
• Type: internship

Austin

• Skills: Digital Design, Mixed-Signal, Machine Learning, Verilog, SoC Power Management, AI Implementation, Control Theory, TCL scripting, Python, Semiconductor Manufacturing
• Level: senior
• Type: full_time

Austin

• Skills: RF, Analog, Mixed-Signal, Digital, Circuit Design, DSP, Embedded Systems, PCB design, Automotive testing, Signal integrity
• Level: entry
• Type: full_time

Austin

• Skills: SRAM compiler, circuit design, timing characterization, power characterization, netlist, EDA tools, TCMC N10, Cadence, Synopsys, technology
• Level: senior
• Type: full_time

Austin

• Skills: SoC, verification, automation, design, hardware, collaboration, engineering, performance, development, architecture
• Level: mid
• Type: full_time

Austin

• Skills: analog semiconductors, PCB design, automated testing, C programming, Python scripting, circuit analysis, electrical fundamentals, debugging, electronics lab equipment, product development
• Level: entry
• Type: internship

Austin

• Skills: C/C++ programming, Python, hardware design, low-level software development, technical drawings, schematics, test strategies, data analysis, IC testing, troubleshooting
• Level: entry
• Type: internship

Austin

• Skills: DRAM, Signal Integrity, Power Integrity, semiconductor manufacturing, memory interface design, chipset debugging, technical program management, customer engagement, qualifications, applications engineering
• Level: mid
• Type: full_time

Austin

• Skills: physical design, low power, Static Timing Analysis, synthesis, place and route, clock tree synthesis, high-speed design, design for high frequency, electromigration analysis, EDA tools
• Level: mid
• Type: full_time

Austin

• Skills: Field Applications Engineer, high-speed protocols, low-speed protocols, PCIe, Ethernet, CXL, debug experience, Data Center systems, Firmware development, scripting with Python
• Level: senior
• Type: full_time

Austin

• Skills: STA, static timing analysis, RISC-V CPU, scripting, Python, Perl, TCL, ECOs, timing paths, optimization
• Level: mid
• Type: full_time

Austin

• Skills: FPGA design, project management, communication systems, hardware platforms, aerospace, defense, telecommunications, industrial automation, engineering design review, collaboration
• Level: mid
• Type: full_time

Austin

• Skills: ASIC, Design Verification, SystemVerilog, UVM, SoC, verification test bench, collaborate, networking protocols, verification methodologies, performance verification
• Level: senior
• Type: full_time

Austin

• Skills: RTL design, microarchitecture, Verilog, SystemVerilog, EDA flows, timing closure, low-power components, high-performance, AI hardware, collaborative environment
• Level: mid
• Type: full_time

Austin

• Skills: PCB layout, library management, RF electronics, aerospace applications, digital electronics, power electronics, schematic capture, multitasking, startup environment, hands-on work
• Level: senior
• Type: full_time

Austin

• Skills: NVM design, Analog Compute Engine, Circuit verification, Semiconductor physics, Full chip simulation, Python, Verilog-A, System Verilog, Memory technology, Chip planning
• Level: senior
• Type: full_time

Austin

• Skills: DAC, ADC, CMOS, analog design, mixed-signal, transistor-level, circuit simulation, behavioral modeling, silicon evaluation, layout compliance
• Level: senior
• Type: full_time

Austin

• Skills: CPU design, RTL design, Verilog, SystemVerilog, digital logic, synthesis techniques, performance optimization, microarchitecture, low-power design, hardware development
• Level: mid
• Type: full_time

Austin

• Skills: Design Verification, UVM, computer architecture, digital dataflow architecture, emulation, verification infrastructure, testbench development, AI workloads, scheduling subsystems, DMA engines
• Level: senior
• Type: full_time